As higher-resolution images (video images) are to be displayed on display units such as monitors and display devices these days, the number of display pixels of a display unit is made equal to the number of pixels in an image signal having the image information in an attempt to bring out the highest display capacity of the display unit. In a navigation system, for example, an image signal having map image information is output from the drawing unit in compliance with the number of display pixels of the display unit, so that the number of pixels in the image signal becomes equal to the number of display pixels in the display unit. By doing so, a clear image (picture) is presented.
However, if the image signal from the drawing unit is output in different timing from the timing of displaying each pixel on the display unit, a blurred image is displayed. Therefore, the timing of displaying pixels is manually changed and adjusted, while the operator is monitoring the image actually displayed on the display unit.
Patent Document 1 discloses a display device that can synchronize the timing of displaying each pixel on the display unit with a display clock signal that controls the pixel display timing, and accordingly can prevent feathering and blurring in each image. More specifically, in each video signal that is output from the image generating unit of the display device, a horizontal position fine-adjustment signal for controlling the timing of displaying each pixel contained in the image to be displayed is superimposed on a predetermined horizontal scanning line within a vertical return period corresponding to an outside region that is located outside the display screen of the display unit and does not contribute to the display of the image. The region in the vicinity of the peak value of the horizontal position fine-adjustment signal (a non-square wave) is compared with a reference voltage (the threshold), and corrugating is then performed to output a “high” signal. Based on the timing of the “high” signal, the timing of the display clock signal is adjusted.    Patent Document 1: Japanese Patent Application Laid-Open No. 2000-122621